Synopsys VCS vR-2020.12-SP1

Apr 18, 2025 - 13:36

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The Synopsys VCS functional verification solution is the primary verification solution used by a majority of the world’s top semiconductor companies. VCS provides the industry’s highest performance simulation and constraint solver engines. VCS’ simulation engine natively takes full advantage of multicore processors with state-of-the-art Fine-Grained Parallelism (FGP) technology, enabling users to easily speed up high-activity, long-cycle tests by allocating more cores at runtime. VCS has innovative features to achieve higher performance and enable shift left verification flows early in the design cycle to catch additional bugs. Synopsys Design Constraints (SDC) Verification, Intelligent Coverage Optimization (ICO), Dynamic Performance Optimization (DPO), and Dynamic Test Loading (DTL) are innovations that significantly expand the application of the solution. In addition, the comprehensive VCS solution offers Native Testbench (NTB) support, broad SystemVerilog support, verification planning, coverage analysis and closure, and native integration with Synopsys Verdi debug, the industry’s de-facto debug standard. VCS is uniquely positioned to meet designers and verification engineers needs to address the challenges and complexity of today’s SoCs

Features of Synopsys VCS:

High-Performance Simulation: Industry’s highest performance simulation solution Multicore parallelism for faster verification
Comprehensive Verification Solution: Native Testbench (NTB) support Broad SystemVerilog support Verification planning Coverage analysis and closure Native integration with Synopsys Verdi debug, the industry’s de-facto debug standard
Innovative Features: Synopsys Design Constraints (SDC) Verification Intelligent Coverage Optimization (ICO) Dynamic Performance Optimization (DPO) Dynamic Test Loading (DTL)
Integration with Other Tools: Native integration with Verdi debug Integration with other tools in the Synopsys Verification Family, including virtual prototyping, formal and static verification, low power verification, FPGA-based prototyping and emulation